A Large-Scale Industrial Case Study on Architecture-Based Software Reliability Analysis

Abstract—Architecture-based software reliability analysis methods shall help software architects to identify critical software components and to quantify their influence on the system reliability. Although researchers have proposed more than 20 methods in this area, empirical case studies applying these methods on large-scale industrial systems are rare. The costs and benefits of these methods remain unknown. On this behalf, we have applied the Cheung method on the software architecture of an industrial control system from ABB consisting of more than 100 components organized in nine subsystems with more than three million lines of code. We used the Littlewood/Verrall model to estimate subsystems failure rates and logging data to derive subsystem transition probabilities. We constructed a discrete time Markov chain as an architectural model and conducted a sensitivity analysis. This paper summarizes our experiences and lessons learned. We found that architecture-based software reliability analysis is still difficult to apply and that more effective data collection techniques are required. Keywords-Software reliability growth, software architecture, Markov processes I

Язык и мировая культура: взгляд молодых исследователей. Ч. 1

Настоящий сборник объединяет исследовательские проекты аспирантов и преподавателей языковых кафедр и содержит материалы, представляющие широкий круг научно-учебных интересов в парадигме современных гуманитарных знаний, и включает, в основном, вопросы теории и практики преподавания иностранных языков. Сборник адресован аспирантам и преподавателям, а также всем, кого интересует теория и методика профессионального образования, методика обучения иностранным языкам, изучение языков в их взаимосвязи с философией, литературой, историей и культурой

Effective Verification for Low-Level Software with Competing Interrupts

Interrupt-driven software is difficult to test and debug, especially when interrupts can be nested and subject to priorities. Interrupts can arrive at arbitrary times, leading to an exponential blow-up in the number of cases to consider. We present a new formal approach to verifying interrupt-driven software based on symbolic execution. The approach leverages recent advances in the encoding of the execution traces of interacting, concurrent threads. We assess the performance of our method on benchmarks drawn from embedded systems code and device drivers, and experimentally compare it to conventional approaches that use source-to-source transformations. Our results show that our method significantly outperforms these techniques. To the best of our knowledge, our work is the first to demonstrate effective verification of low-level embedded software with nested interrupt